A High(er) Power H-Bridge for Servo control - Design

by Ivan Hamilton 8/29/2011 7:26:00 PM

Alright... most of the thinking has been done. Here's what we'll need:

  • Input Opto-isolators
  • MOSFET Drivers
  • Current sensing
  • Adjustable "current" reference
  • "Current" comparator
  • Over-current latch
  • Logic/Gate/Motor supply voltages
  • Miscellaneous support circuitry

Our overall goal is to translate two 3.3V inputs (A & B) into two high voltage, high current outputs (M+ & M-).

Input Opto-isolation

Role: Protect the source of the inputs & convert 3.3V signal to 5V.

Input: 3.3V @ 12mA, Output: 5V

Although it shows the HCPL2530, I'm actually using a HCPL2531. The HCPL2531 has lower propagation times (roughly half) and a higher Current Transfer Ratio (50% more).

R1 & R2 are current limiting resistors to deliver the correct current the the emitter within the opto-isolator. The HCPL2531's emitters have a typical forward voltage of 1.45V, and we'll be looking to take a signal from a chip producing 3.3V @ 8mA (far below HCPL2531's maximum current of 25mA).

A current limiting resistor to suit is R=(VS - VF)/I=(3.3V - 1.45V)/8mA=231.25Ω, a close E6 series resistor is 220Ω, giving 8.4mA.  

The outputs of the HCPL2531 are an "Open Collector" arrangement. When the input is "on", the internal transistor will conduct to ground. By connecting this output "collector" to a current supply (a current limiting resistor to a voltage supply) a signal is produced.

Unfortunately, the signal is inverted. When the input is low, the transistor is off and the output goes high. When the input goes high, the transistor conducts and pull the output low. Further processing will to required to (un)invert the signal.

R3 & R4 are pull up resistors to place current on the output pins that the internal transistor will overcome. The HCPL2531's Current Transfer Ratio (output collector current to the forward LED input current) is 30%. So, with 8.4mA to the LED, only 2.52mA will be sunk to ground during the "on" condition. With a 5V supply, R=V/I=5V/2.52mA=1984Ω. A close E6 series resistor is 2.2KΩ, giving 2.3mA.

Input Conversion

Role: Take the output signals of the opto-isolator, and prepare signals suitable for other parts of the system.

As mentioned previously, our A & B inputs were inverted by the opto-isolators. We need to (un)invert them back to original high/low states as inputs to the H-Bridge driver chips. We also need combined A OR B signals to be fed to the reset mechanism of the current control section. So, two NOT (inverter) gates and an OR gate. This could be achieved with one 4069 hex inverter, and one 4071 quad 2-input OR gate chip. But there is another way. We have NOT A & NOT B signals, and want A OR B. De Morgan's laws state that P OR Q = (NOT P)NAND(NOT Q). Therefore we can use a NAND gate to produce A OR B from NOT A & NOT B. NAND gates can also function as inverters, by appying the signal to both inputs (or one input, and the other fixed high). By using the same gate type for both operations, a single 4011 Quad 2-Input NAND gate chip can be used for all logic conversion. A pin-compatible 4093 Schmitt Triggered Quad 2-Input NAND could also be used, with it's inputs being less suceptible to noise (our opto's output shouldn't be too noisy).


Role: Take A, B & /SD (enable) signals and produce V+ or V- at M+ & M- pads, and current sense signal (CSENSE).

This is the heavy lifting part of the circuit. 5V logic signals come in, and high voltage, high current signals go out.

The heart of the system are two IR21844 Half-Bridge Drivers (one for each side). They provide: output source/sink current capability 1.4A/1.8A, under voltage protection (gates won't drive with less than ~8V), adjustable dead-time (turn off one MOSFET vs turn on the other), floating high-side (up to 600V).

Let's look at a single side (A's, which is at the top of the diagram).

C1 & C3 are bypass capacitors to keep the voltage supply stable.

R6 is the adjustable dead-time resistor, and 39K provides ~1µS.

R5 & R7 are current limiting resistors for the IR21844. Giving that we have 12V to drive the gates, 22Ω will give 545mA - quite conversative given the IR21884 is rated to source 1.4A.

C2 & D2 provide the "bootstrap" mechanism. This is used to provide a gate voltage above the motor supply. It relies upon the lower gate Q1 conducting (the standard low state), then current flows from the gate supply (12V) thru D2 and charges C2 to 12V. When the output goes high, Q1 shuts off and the charge in C2 is connected to HO, driving (thru R5) Q3 on. The charge in C2 must be enough to supply gate voltage for the duration off the high state, since it's only recharged during the low state.

Sizing of this capacitor needs to account for: turn on required gate charge, gate-source leakage current, floating section quiescent current, floating section leakage current, bootstrap diode leakage current, desat diode bias when on, charge required by the internal level shifters, bootstrap capacitor leakage current & high side on time. International Rectifier's Design Tip DR04-4 proviodes details and examples of bootstrap sizing. In my calculations, I found it was dominated by the gate charge (70nC for the IRF540), and that 3 times the gate charge (3 x 70nC = 0.210uF) was a good guide.

D2 must switch fast enough to allow C2 to charge during the low period (~1uS), and high enough reverse breakdown to fend off the high motor supply voltages. My selected 1N4004 @ 400V may be too slow and high-speed UF4004s may be required instead.

Finally, current thru the motor must flow via U$1 & U$2 current sensing resistors. It's important that these are low value (to reduce power and voltage drop), accurate, non-inductive (giving the high-speed PWM) and capable of disapating the required power. Open air current sense resistors are suitable for this purpose. If we want to sense 30A as 0.3V, we need 10mΩ resistance @ 9W. This is achieved with 2 x 20mΩ %1 5W resistors in parallel (or a single one for <15A).

The /SD (enable) signal is supplied from the current limiting system and shutsdown the outputs.

Adjustable Current Reference

Role: Provide a user adjustable reference voltage

We need a user adjustable reference to compare the voltage from the current sense resistors against to determine an "over-current" situation.

I'm looking for a 25A limit, so adjustment across the 0-0.25V range. A voltage divider from a 39K resistor & 2K pot give a 5V/(39KΩ+2KΩ)*2KΩ=0.24V range (changing this resistor to 33KΩ would give 0-0.29V for a 29A limit).

C8 provides some filtering to avoid ambient & adjustment noise.


Current Compare & Cutout 

Role: When the sensed current rises above the reference level, disable the MOSFET drivers until A or B goes high again.

A 4013 D-type flip-flop provides the /SD (enable) line for the H-Bridge driver chips, which must be high for the drivers to operate. When A OR B goes high, the flip-flop samples it's data value (always high, since we tied D to 5V) and placed it on the output Q, thereby switching the drivers on. This happens at the start of every A OR B pulse.

The H-Bridge driver goes to ground via current sense resistors providing a voltage @ CSENSE. To keep out noise, we pass this thru a low pass filter made by R13 & C7 with a cut-off frequency of 1/(2πRC)=1/(2π 100Ω x 0.001uF)=1.5MHz.

D3 protects the comparator from the filtered CSENSE signal going negative. It is a BAT85 schottky diode providing a lower forward voltage and fast switching.

The filtered current sense voltage is compared with the user reference voltage by a LM393 comparator. When the voltage (sensed current) exceeds the user preference, the comparator will go "high". Like the opto-isolators, this is also an "open collector" device - when the comparator's output is "high", the output pin will conduct to ground (overwhelming the R14 pullup resistor) and go "low". This low signal on the flip-flop's Reset input will switch Q off, disabling the H-Bridge driver chips until the current drops below the threshold and the next A OR B pulse starts. 



And that's it for the first revision. You can get a PDF of the full schematic here: 110829_MediumPowerPwmHBridge.v0.1.pdf (19.19 kb)

A few things to remember:

  • I have no idea what I'm doing. I'm neither trained nor experienced in electronics design. I'm making this up as I go.
  • So far, this is just a theoretical design. In the "real-world", there are no theoretical components, only "real-world" ones that often need more care.
  • This has not been "designed for production", so there's probably numerous optimisations that could be make.

Next? The physical layout.

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